Can Pull-up Resistors Be Used on SPI Lines?

Take a look at any type of multiconductor serial bus that uses single ended traces. You'll probably see some resistors sitting around the bus being connected to driver pins and power or ground. The use of these resistors is intentional with the purpose being to set the signal level and reflection control on the bus. The other reason is placement as a pull-up resistor, where a line in the bus is pulled up to the signal power supply level.

On an SPI bus, this is sometimes a debated topic because of the way the I/O buffer circuitry operates in the bus. Reference designs can also make the situation confusing because some reference designs will include pull-up resistors on SPI lines, while other reference designs will not.

Which of these approaches should you use? We’ll investigate that question in this article. On some lines, you will never use pull-up resistors, but the use of resistors on some SPI bus lines has its purpose.

When to Place Pull-up Resistors on SPI Traces

The buffer circuitry in an SPI bus has push-pull topology, where complementary MOSFETs are used to source and sink a signal onto a conductor in the bus. Push-pull drivers essentially connect a conductor directly to the power supply when driving the signal onto the trace. When sinking the signal, the push full driver connects the trace back to ground. This is what gives you the switching action between two logic states as seen at the load end of the bus.

Simple SPI I/O buffer model.

The SPI bus uses up to four conductors, with three of them being mandatory. If you have multiple peripherals on the bus, then you would need a chip select (CS) line for each peripheral. This gives four potential places where pull-ups might be placed.

On the MOSI, MISO, or CLK Lines?

The best practice is not to place pull-up resistors on these lines. In general, on a push pole bus, there is no need for a pull-up resistor or pull down resistor. In the high or low sourced logic state, the path for current through the buffer circuit is low impedance, and placing a pull-up/pull-down resistor has minimal effect on the impedance in the I/O buffer circuit. We can see this from the current paths in the buffer circuit showing below.

Simple SPI I/O buffer model with current paths during sourcing (green) and sinking (red).

There is sometimes a recommendation to place a pull-up resistor on the MISO (SDI) line on the master component. From an operational standpoint in general, the effect is the same if it were placed on the MOSI (SDO) line on the same component. The reason for doing this is sometimes cited as one of circuit protection during system startup. This is one of the instances where it can make sense to include a pull-up resistor as it will forcibly toggle the line into a specific logic state without drawing a lot of current.

However, you should check the component datasheet before using a pull-up resistor in this way. It is possible that the component contains an internal pull-up resistor for this specific purpose. If that is the case, an external resistor will not be needed. The same idea applies to pull-down resistors.

On the CS Line?

CS lines are another instance where it might be advisable to to include a pull-up resistor in the SPI bus. CS lines are used to toggle which of the peripherals are active and can accept clock and data from the serial bus. The justification for doing this is similar to the previous case of placing a pull-up resistor on the MISO line.

SPI I/O buffer model with pull-up resistor on CS line.

By placing the resistor on the CS line, you are also forcing the CS line into a specific logic state during system startup. This could be important because, during startup, a peripheral’s input buffer could be floating and would sit in an indeterminate logic state. Placing the resistor on the CS line forces it into a specific logic state while the system starts up but before the SPI clock begins oscillating. Once the master’s clock is oscillating, the CS line can be pulled low safely as needed.

As was the case previously, the CS I/O buffer circuit in the master could include a pull-up resistor. If this is the case, then an external resistor is not needed.

Typical Resistor Values (If They Are Used)

As we can see above, pull up resistors are only needed on SPI lines in specific cases, and they may already be present internally to the chips on the bus. If you decide to include a pull-up or pull-down resistor on an SPI line, the typical value is 10 kOhms or larger. There are a couple simple guidelines for using these:

• Place a pull-up or pull-down near the drive pin

• Small case sizes with low power rating are acceptable

Before placing these resistors, just make sure to check the datasheet for the master component.

Whenever you want to build and analyze digital or analog circuits, make sure you simulate your designs with the complete set of mixed-signal simulation features in PSpice from Cadence. PSpice users can access a powerful SPICE simulator as well as specialty design capabilities like model creation, graphing and analysis tools, and much more.

Subscribe to our newsletter for the latest updates. If you’re looking to learn more about how Cadence has the solution for you, talk to our team of experts.