Power Dynamic Range: Selecting and Modifying

Key Takeaways

• The power dynamic range is the range of acceptable inputs to a receiver that are high enough to stand out from the noise background while remaining low enough to avoid compression.

• Generally, the compression point and MDS are intrinsically linked, and it’s impossible to expand the dynamic range on both ends simultaneously.

• Confirming the compression point or MDS requires in-circuit analysis.

While technology has advanced, power dynamic range calculations for fundamental receiver topologies remain unchanged.

Circuit designers must contend with multiple design revisions, but selecting appropriate components is an iterative process. Like a multi-stage interview process, designers will begin with seemingly relevant components based on the manufacturer’s information before further refining based on simulation results and, eventually, physical prototyping. Designers learn early on that in-circuit performance tops all other metrics, and the power dynamic range of a receiver is no exception. 

Tradeoffs in the Power Dynamic Range

Power Dynamic Range Defines Receiver Input Limits

Dynamic range is the ratio of the maximum power input level and the minimum power input level (also known as the noise floor in audio applications), indicating the accepted operating values for a receiver. These boundaries prevent common issues relating to signal processing:

• Saturation - At the high end of the scale, the behavior of the input device is no longer linear (i.e., the gain product does scale proportionally). Instead, it experiences saturation, where unintentional clipping or distortion of the waveform occurs. Datasheets may define the saturation as a combination of the third-order intercept (TOI) or the 1-dB compression point, expressed as a dB ratio of 1-mW (dBm) on the input and output; the TOI is the underlying mathematical concept, while the compression point is typically the “quality.” Damage to the device may result from input power levels that further exceed the saturation limit.
• Minimum discernable signal (MDS) - The sensitivity threshold for the device; signals that fall below this value on the input are indiscernible from the background noise of the component and are thus undetectable. It’s important to note that sensitivity can be ambiguous and partially depends on the level of the signal input power. Ergo, a device with a higher MDS may perform better if it is more suitable for high-level input signals than a higher sensitivity component.

Failure to heed the saturation and MDS limits is an undesirable outcome; the solution when signals don’t fall within these limits, assuming component replacement is not an option (due to cost, availability, board space, etc.), is to adjust the dynamic range on the input to expand the signal ceiling and floor. Accomplishing this goal means modifying either the high- or low-ends of the receiver input. To prevent saturation, engineers must reduce the gain (or, equivalently, increase the attenuation) of the input, and conversely, raising the minimum level of detectability requires improving the input gain. Thus, the two factors are in direct conflict: it is usually impossible to expand the dynamic range simultaneously (without exchanging components). Instead, it’s more appropriate to consider altering the dynamic range as a shift of the current scale. 

Why Topology Matters in Receiver Performance

Designers must be aware that while the compression point and MDS of individual components may be readily available through datasheets, the limits on the dynamic range depend on the in-circuit performance. In other words, topology is essential to determine saturation, and this value can be less than the information provided by documentation. Many factors play into calculating the power dynamic range, using a superhet receiver as an example:

• Based on several operating factors (temperature, direction, gain, etc.), the antenna exhibits a noise temperature. 
• The low-noise amplifier (LNA) provides the bulk of the circuit gain while imparting minimal noise. This characteristic is also true for the intermediate frequency amplifier (IFA).
• The preselector acts as a passband for the desired frequency bandwidth. For the dynamic range, it has an inherent amount of insertion loss. The intermediate frequency filter (IF filter) that removes high-frequency signals from the local oscillator (LO) also experiences insertion loss.
• The mixer converts the incoming RF signal to the intermediate frequency and has some conversion loss. 

The gain of the components is an intrinsic characteristic. However, the noise figure is a cascading function that compares the noise at a particular point in the circuit to the gain of the components that preceded it. With the antenna as a fixed input position and a nebulous power output as the final stage of the receiver, moving an amplifier within this arrangement does not affect the receiver gain but does change the noise figure. This change, in turn, affects the signal-to-noise ratio (SNR) of the output power: higher noise output power raises the threshold for meaningful signal discernability (and vice versa).

Similarly, determining the limiting compression point of the circuit requires analyzing the circuit holistically. In order from receiver input to output, each item of the receiver circuit experiences a unique input and output power (and thus, variable gain) while the overall gain of the circuit remains constant. Designers must evaluate the gain at each amplifier stage to discover the lowest saturation point among the components, as any point where distortion occurs. For a superheterodyne receiver, the mixer or LNA is most likely the lowest power at which distortion occurs, but topology is ultimately the most important factor. Of course, there are limits to receiver rearrangements as certain functionality of the circuit must occur sequentially to have any meaningful effect.

Cadence Software Has Dynamic Solutions for RF Designs

Power dynamic range is a vital topic for understanding RF receiver applications. As typical with engineering, determining the ideal circuit is a balancing act between cost and various parameters (bandwidth, gain, SNR, etc.), and designers need to consider multiple components and topologies to discover the best performance that aligns with project requirements. Cadence’s PCB Design and Analysis Software suite provides design teams with comprehensive simulation tools and a vast library of component models to accelerate product development while leaving no stone unturned. When it’s time to switch to board design, OrCAD PCB Designer integrates seamlessly with simulation results to effortlessly switch to a DFM-driven ruleset.

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