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Fan-Out Packaging

Published Date
Author Cadence PCB Solutions

Key Takeaways

  • Fan-out design enhances miniaturization and performance in electronic devices by allowing more external connections outside the die area, enabling higher I/O density and compact packaging.

  • Fan-out packaging not only supports increased connection points without enlarging the die size but also offers improved electrical and thermal performance, making it essential for complex semiconductor devices.

  • While fan-out design presents advantages like higher integration and cost-effectiveness, it also faces challenges such as fabrication complexities and material-related warpage, necessitating ongoing innovations for future applications.

Basic diagram of the first commercial fan-out wafer-level packaging

Basic diagram of the first commercial fan-out wafer-level packaging

As the progression of electronics marches forward, there's an ever-increasing push towards miniaturization and enhanced performance in devices, driving innovation in integrated circuit designs and packaging. Specifically, the advent of fan-out packaging. Fan-out packaging is a design method where the connections (or I/Os - input/outputs) fan out from the die or chip, expanding beyond its periphery. This contrasts traditional fan-in designs, where connections are confined within the die area.

Fan-Out Packaging Advantages

Advantage

Description

Enhanced Miniaturization

Enables more compact and thinner IC packages, ideal for portable devices.

Increased I/O Density

Fan-out design allows for more connections per unit area, accommodating more I/Os than the die area would traditionally allow.

Improved Electrical Performance

By reducing the distance between the chip and the connections, fan-out packaging enhances electrical performance and reduces signal latency.

Better Thermal Management

Enhances heat dissipation, crucial for maintaining IC integrity and performance.

Higher Integration Capability

Fan-out packaging supports the integration of multiple dies in a single package, paving the way for system-level integration and heterogeneous integration.

Cost-Effectiveness

Despite its advanced capabilities, fan-out design can be cost-effective, especially when implemented in large-scale production.

Reduced Footprint

The technology enables the development of thinner and smaller IC packages, crucial for compact and portable devices.

Advanced RDL Features

Features state-of-the-art RDLs with up to five layers, mimicking on-chip dual damascene integration.

Understanding Fan-Out Packaging

While the compact design of traditional Wafer-Level Packaging (WLP) is compact, it limits the number of external contacts, which becomes a notable issue for complex semiconductor devices that require a multitude of contacts. Fan-out packaging emerged as a solution to this limitation.

Fan-Out Construction

In essence, "Fan-Out" packaging is a technique where the connections spread out from the surface of the chip, allowing for a greater number of external I/Os. Unlike traditional WLP, fan-out packages encapsulate the dies completely using an epoxy mold compound rather than mounting them on a substrate or interposer.

Through multiple complex steps, fan-out packages are constructed with meticulous precision::

  •  Unlike the traditional WLP process, fan-out WLP involves dicing the wafer first. 
  • The dies are then meticulously repositioned on a carrier wafer or panel, leaving space around each die for fan-out.
  •  The carrier undergoes a reconstitution process through molding.
  • A redistribution layer is applied over the entire molded area—covering both the chip and the adjacent fan-out region. 
  • Finally, solder balls are formed on top.

Fan-Out Packaging Types

Fan-out process flows are categorized into two main types: die first (also known as mold first) and Redistribution Layer (RDL) first. Within these processes, dies can be positioned either face up or face down on the carrier wafer or panel.

Die/Mold First

Redistribution Layer (RDL)

Thermal release tape is applied to a carrier wafer. The die is then placed on the carrier. The process then involves overmolding, carrier release, RDL formation, solder bumping, and finally, singulation.

The release layer is deposited first, followed by RDL, placement of KGDs, overmold, carrier release, solder ball deposition, and singulation.

The most advanced fan-out packages today feature RDLs with up to five layers, with line widths and spaces (the width and pitch of metal traces) shrinking down to an 2µm. This impressive scaling into the micron interconnect range signifies that the RDL process is beginning to resemble on-chip dual damascene integration more closely.
 

Challenges With Fan-Out Packaging

Although fan-out packaging has multiple advantages, it faces challenges such as technical complexities in fabrication, handling of thin wafers, and ensuring reliability. A specific challenge with fan-out design is combating warpage. This occurs when there is a mismatch of CTE between silicon, polyimide (in RDL), and epoxy molding compounds. Even though warping can be minimized by selecting better dielectric material with lower cure temperatures, it is a challenge nonetheless—and only one of many challenges along the way.

Future Developments

A recent trend in fan-out packaging is modeling FOWLP for millimeter wave antenna and millimeter wave packaging, making the dielectric material a very important element. Mechanical and low-loss dielectric properties must be up to par to integrate a millimeter wave antenna with the fan-out packages. Additionally, low copper RDL roughness and lithographic techniques that adapt to topography are needed to achieve good CD uniformity of the redistribution layer, which is critical to achieving high gain and low loss transfer. Another recent trend in packaging is to use a standard fan-out type RDL, but with the dies embedded in alternative materials like organic laminate or silicon wafer instead of the traditional mold compound. 

As a whole, fan-out packaging represents a significant leap forward in the evolution of electronic design. For designers looking to harness the full potential of this technology, Allegro X Advanced Package Designer emerges as the go-to tool. It provides a comprehensive suite of features tailored for creating sophisticated packaging designs with precision and efficiency. Whether you're aiming to miniaturize your devices or improve their performance, leveraging Allegro X can help you unlock the true power of fan-out packaging.